Most synthesizers known to the art are of the conventional phase-locked loop (PLL) type. In the simplest configuration, the PLL synthesizer includes three basic elements:
(1) a voltage controlled oscillator PA0 (2) a frequency and phase comparator PA0 (3) a low pass filter.
The above elements operate together to change the frequency of an output signal to equal the frequency of an input signal. In particular, the frequency and phase comparator compares the relative phases of the input and output signals and generates a phase error signal when a phase difference between the two signals occurs. This phase difference indicates a frequency difference between the input and output signals. The phase error signal is filtered and stabilized by the low pass filter, and then applied to the voltage controlled oscillator. The voltage controlled oscillator generates, in response to the phase error signal, the output signal having a frequency change equal to the amount of the frequency difference. The output signal is then fed back via a loop to the frequency and phase comparator following the change in frequency of the output signal to determine that the input and output signals are now in phase and of equal frequencies.
If the output signal is equal in frequency to the input signal, no phase error signal is generated and the frequency difference is equal to 0. This condition indicates that the two signals are in phase and that the frequencies of the input and output signals are locked i.e., equal. However if the output signal is not equal in frequency to the input signal, a phase error signal is generated and the frequency difference is not equal to 0. This condition indicates that the two signals are out of phase and therefore, the frequencies of the two signals are not locked i.e., not equal. Under the later condition, the voltage controlled oscillator generates the output signal having a frequency change equal to the amount of the frequency difference. The frequency of the output signal either increases or decreases to preserve a locked condition, i.e., the input and output signal are in phase and of equal frequencies.
The inclusion of additional elements allows more sophisticated synthesizers to provide a proportional frequency relationship between the input and output signals. In this arrangement, the frequency of the input signal is divided by an integer M, and the generated output signal from the voltage controlled oscillator is divided by an integer N. The relative phases and frequencies of these two divided signals are then compared in the frequency and phase comparator to determine if the proportional frequency relationship exists. Phase locking imposes a condition that may be expressed as follows: ##EQU1## where the frequency difference between the input and output signals is: ##EQU2## This relationship indicates that the output frequency is locked to a rational fraction of the input frequency.
In any PLL-type of arrangement, any change or adjustment to the frequency of the output signal is a function of the frequency difference between the input and output signals. The amount of frequency difference bears a direct relationship to the frequency of the input signal as illustrated by the above equations. Under conditions where the input signal maintains a fixed frequency, i.e., the input signal is stable, a desired frequency difference is always maintainable. However under conditions where the input signal changes frequency, i.e., the input signal is not stable, a PLL-type of arrangement is of limited use. The adjustment to the frequency of the output signal is a function of the frequency difference between the input and output signals. The frequency difference changes with respect to any changes occurring in the frequency of the input signal. Therefore when a specified frequency relationship between an input and output signal is desired, an unstable input signal precludes the maintenance of a desired output frequency since the adjustment to the output frequency is a direct function of the frequency difference between the two signals.
It is, therefore, desirable to provide an arrangement that is capable of precisely adjusting the output signal so that the desired frequency relationship or difference exists regardless of the stability of the frequency of the input signal.